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| LS4117, 4118, 4119 Linear Integrated Systems ULTRA-HIGH INPUT IMPEDANCE N-CHANNEL JFET FEATURES LOW POWER MINIMUM CIRCUIT LOADING IDSS<90 A (2N4117) IGSS<1 pA (2N4117A Series) D ABSOLUTE MAXIMUM RATINGS (NOTE 1) @ 25C (unless otherwise noted) Gate-Source or Gate-Drain Voltage (NOTE 1) Gate-Current Total Device Dissipation (Derate 2mW/C to 175C) Storage Temperature Range Lead Temperature (1/16" from case for 10 seconds) G 2 3 4 Case G -40V 50mA S D 1 C S 300mW -65C to +175C 255C TO-72 Bottom View ELECTRICAL CHARACTERISTICS @ 25C (unless otherwise noted) 2N4117/A 2N4118 FN4117/A 2N4118A SYMBOL CHARACTERISTICS MIN MAX MIN MAX Gate Reverse Current --10 --10 IGSS Standard only --25 --25 IGSS Gate Reverse Current --1 --1 BVGSS VGS(off) IDSS gfs gos Ciss Crss "A" Series only Gate-Source Breakdown Voltage Gate-Source Cutoff Voltage --40 -0.6 -2.5 --1.8 0.09 210 3 3 1.5 --40 -1 0.08 80 ----2.5 --3 0.24 250 5 3 1.5 2N4119 2N4119A MIN MAX --10 --25 --1 --40 -2 0.20 100 ----2.5 --6 0.60 330 10 3 1.5 UNITS pA nA pA nA V mA CONDITIONS VGS= -20V VDS= 0 150C VGS=-20V VDS= 0 150C IG=-1A VDS=10V VDS=10V VDS= 0 ID= 1nA VGS= 0 Saturation Drain Current 0.03 (NOTE 2) FN4117/A 0.015 Common-Source Forward 70 Transconductance (NOTE 2) Common-Source Output -Conductance Common-Source Input -Capacitance Common-Source Reverse -Transfer Capacitance mho f=1kHz VDS= 10V pF VGS= 0 f=1MHz NOTES: 1. Due to symmetrical geometry, these units may be operated with source and drain leads interchanged. 2. This parameter is measured during a 2 ms interval 100 ms after power is applied. (Not a JEDEC condition.) Linear Integrated Systems 4042 Clipper Ct., Fremont, CA 94538 TEL: (510) 490-9160 * FAX: (510) 353-0261 |
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